View R1LV3216RSD-5SIB0_8328576.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

rej03c0367-0100, rev.1.00, 2009.05.07 page 1 of 16 r1lv3216r series 32mb advanced lpsram (2m word x 16bit / 4m word x 8bit) rej03c0367-0100 rev.1.00 2009.05.07 description the r1lv3216r series is a family of low voltage 32-mbit static rams organized as 2,097,152-word by 16-bit, fabricated by renesas?s high-performance 0.15um cmos and tft technologies. the r1lv3216r series is suitable for memory applications where a simple interfacing, battery operating and battery backup are the important design objectives. the r1lv3216r series is provided in 48-pin thin small outline package [tsop (i): 12mm x 20mm with pin pitch of 0.5mm] and 52-pin micro thin small outline package [ tsop (ii): 10.79mm x 10.49mm with pin pitch of 0.4mm]. it gives the best solution for compaction of mounting area as well as flexibility of wiring pattern of printed circuit boards. features ? single 2.7~3.6v power supply ? small stand-by current: 4 a (3.0v, typical) ? no clocks, no refresh ? all inputs and outputs are ttl compatible. ? easy memory expansion by cs1#, cs2, lb# and ub# ? common data i/o ? three-state outputs: or-tie capability ? oe# prevents data contention on the i/o bus ordering information type no. access time package r1lv3216rsa-5s% 55 ns r1lv3216rsa-7s% 70 ns 12mm x 20mm 48-pin plastic tsop (i) (normal-bend type) (48p3r) r1lv3216rsd-5s% 55 ns r1lv3216rsd-7s% 70 ns 350 mil 52-pin plastic -tsop (ii) (normal-bend type) (52ptg) % - temperature version; see table below % temperature range r 0 ~ +70 c i -40 ~ +85 c
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 2 of 16 pin arrangement 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 a15 a14 a13 a12 a11 a10 a9 a8 a19 cs1# we# nc nc vcc cs2 nc a20 a18 a17 a7 a6 a5 a4 a3 a2 a1 a 16 byte# ub# vss lb# dq15/a-1 dq7 dq14 dq6 dq13 dq5 dq12 dq4 nc dq11 dq3 dq10 dq2 dq9 dq1 dq8 dq0 oe# vss nc a0 52-pin tsop (ii) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 a15 a14 a13 a12 a11 a10 a9 a8 a19 a20 we# cs2 nc ub# lb# a18 a17 a7 a6 a5 a4 a3 a2 a1 a 16 byte# vss dq15/a-1 dq7 dq14 dq6 dq13 dq5 dq12 dq4 vcc dq11 dq3 dq10 dq2 dq9 dq1 dq8 dq0 oe# vss cs1# a0 48-pin tsop (i)
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 3 of 16 pin description pin name function vcc power supply vss ground a0 to a20 address input (word mode) a-1 to a20 address input (byte mode) dq0 to dq15 data input/output cs1# chip select 1 cs2 chip select 2 we# write enable oe# output enable lb# lower byte enable ub# upper byte enable byte# byte control mode enable nc non connection
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 4 of 16 block diagram a 0 cs1# a 1 cs2 lb# ub# we# oe# a 20 byte# dq0 dq1 dq7 dq8 dq9 dq15 / a -1 vcc vss column decoder x 8 / x16 control dq buffer address buffer row decoder memory array 2m-word x16-bit or 4m-word x 8-bit dq buffer dat a selector sense / write amplifier clock generator
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 5 of 16 operation table cs1# cs2 byte# lb# ub# we# oe# dq0~7 dq8~14 dq15 operation h x x x x x x high-z high-z high-z stand-by x l x x x x x high-z high-z high-z stand-by x x h h h x x high-z high-z high-z stand-by l h h l h l x din high-z high-z write in lower byte l h h l h h l dout high-z high-z read in lower byte l h h l h h h high-z high-z high-z output disable l h h h l l x high-z din din write in upper byte l h h h l h l high-z dout dout read in upper byte l h h h l h h high-z high-z high-z output disable l h h l l l x din din din word write l h h l l h l dout dout dout word read l h h l l h h high-z high-z high-z output disable l h l l l l x din high-z a-1 byte write l h l l l h l dout high-z a-1 byte read l h l l l h h high-z high-z a-1 output disable note 1. h: v ih l:v il x: v ih or v il 2. when apply byte# =?l?, please assign lb#=ub#=?l?. absolute maximum ratings parameter symbol value unit power supply voltage relative to vss vcc -0.5 to +4.6 v terminal voltage on any pin relative to vss v t -0.5 *1 to vcc+0.3 *2 v power dissipation p t 0.7 w r ver. 0 to +70 c operation temperature topr *3 i ver. -40 to +85 c storage temperature range tstg -65 to 150 c r ver. 0 to +70 c storage temperature range under bias tbias *3 i ver. -40 to +85 c note 1. ?2.0v in case of ac (pulse width 30ns) 2. maximum voltage is +4.6v. 3. ambient temperature range depends on r/i-version. please see table on page 1.
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 6 of 16 recommended operati ng conditions parameter symbol min. typ. max. unit note vcc 2.7 3.0 3.6 v supply voltage vss 0 0 0 v input high voltage v ih 2.4 - vcc+0.2 v input low voltage v il -0.2 - 0.4 v 1 r ver. 0 - +70 c 2 ambient temperature range i ver. ta -40 - +85 c 2 note 1. ?2.0v in case of ac (pulse width 30ns) 2. ambient temperature range depends on r/i-version. please see table on page 1. dc characteristics parameter symbol min. typ. max. unit test conditions input leakage current | i li | - - 1 p a vin = vss to vcc output leakage current | i lo | - - 1 p a byte# vcc -0.2v or byte# 0.2v cs1# =v ih or cs2 =v il or oe# =v ih or we# =v il or lb# = ub# =v ih , vi/o =vss to vcc i cc1 - 40 *1 55 ma min. cycle, duty =100%, i i/o = 0ma byte# vcc -0.2v or byte# 0.2v cs1# =v il , cs2 =v ih , others = v ih /v il average operating current i cc2 - 3 *1 8 ma cycle =1 p s, duty =100%, i i/o = 0ma byte# vcc -0.2v or byte# 0.2v cs1# 0.2v, cs2 v cc -0.2v, v ih v cc -0.2v, v il 0.2v standby current i sb - 0.1 *1 0.3 ma byte# vcc -0.2v or byte# 0.2v cs2 =v il - 4 *1 12 p a ~+25c - 7 *2 24 p a ~+40c - - 50 p a ~+70c standby current i sb1 - - 80 p a ~+85c vin 0v byte# vcc -0.2v or byte# 0.2v (1) 0v cs2 0.2v or (2) cs1# v cc -0.2v, cs2 v cc -0.2v or (3) lb# = ub# v cc -0.2v, cs1# 0.2v, cs2 v cc -0.2v output high voltage v oh 2.4 - - v byte# vcc -0.2v or byte# 0.2v i oh = -0.5ma output low voltage v ol - - 0.4 v byte# vcc -0.2v or byte# 0.2v i ol = 2ma note 1. typical parameter indicates the value for the center of distribution at 3.0v (ta= 25oc), and not 100% tested. 2. typical parameter indicates the va lue for the center of di stribution at 3.0v (ta= 40oc), and not 100% tested.
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 7 of 16 capacitance (ta =25c, f =1mhz) parameter symbol min. typ. max. unit test conditions note input capacitance c in - - 10 pf vin =0v 1 input / output capacitance c i/o - - 10 pf v i/o =0v 1 note1.this parameter is sa mpled and not 100% tested. ac characteristics test conditions (vcc = 2.7v ~ 3.6v, ta = 0 ~ +70c / -40 ~ +85c *1 ) ? input pulse levels: v il = 0.4v, v ih = 2.4v ? input rise and fall time: 5ns ? input and output timing reference level: 1.4v ? output load: see figures (including scope and jig) note1. ambient temperature range depends on r/i-version. please see table on page 1. dq 1.4v r l = 500 ohm c l = 30 pf
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 8 of 16 read cycle r1lv3216r**-5s r1lv3216r**-7s parameter symbol min. max. min. max. unit note read cycle time t rc 55 - 70 - ns address access time t aa - 55 - 70 ns t acs1 - 55 - 70 ns chip select access time t acs2 - 55 - 70 ns output enable to output valid t oe - 25 - 35 ns output hold from address change t oh 10 - 10 - ns lb#, ub# access time t ba - 55 - 70 ns t clz1 10 - 10 - ns 2,3 chip select to output in low-z t clz2 10 - 10 - ns 2,3 lb#, ub# enable to low-z t blz 5 - 5 - ns 2,3 output enable to output in low-z t olz 5 - 5 - ns 2,3 t chz1 0 20 0 25 ns 1,2,3 chip deselect to output in high-z t chz2 0 20 0 25 ns 1,2,3 lb#, ub# disable to high-z t bhz 0 20 0 25 ns 1,2,3 output disable to output in high-z t ohz 0 20 0 25 ns 1,2,3
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 9 of 16 write cycle r1lv3216r**-5s r1lv3216r**-7s parameter symbol min. max. min. max. unit note write cycle time t wc 55 - 70 - ns address valid to end of write t aw 50 - 65 - ns chip select to end of write t cw 50 - 65 - ns 5 write pulse width t wp 40 - 55 - ns 4 lb#, ub# valid to end of write t bw 50 - 65 - ns address setup time t as 0 - 0 - ns 6 write recovery time t wr 0 - 0 - ns 7 data to write time overlap t dw 25 - 35 - ns data hold from write time t dh 0 - 0 - ns output enable from end of write t ow 5 - 5 - ns 2 output disable to output in high-z t ohz 0 20 0 25 ns 1,2 write to output in high-z t whz 0 20 0 25 ns 1,2 note1. t chz , t ohz , t whz and t bhz are defined as the time at which the ou tputs achieve the open circuit conditions and are not referred to output voltage levels. 2. this parameter is sampled and not 100% tested. 3. at any given temperature and voltage condition, t hz max is less than t lz min both for a given device and from device to device. 4. a write occurs during the overlap of a low cs1#, a high cs2, a low we# and a low lb# or a low ub#. a write begins at the latest tr ansition among cs1# going low, cs2 going high, we# going low and lb# going low or ub# going low . a write ends at the earliest trans ition among cs1# going high, cs2 going low, we# going high and lb# going high or ub# going high. t wp is measured from the beginning of write to the end of write. 5. t cw is measured from the later of cs1# going low or cs2 going high to end of write. 6. t as is measured the address valid to the beginning of write. 7. t wr is measured from the earliest of cs1# or we# going high or cs2 goi ng low to the end of write cycle.
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 10 of 16 byte# timing conditions r1lv3216r**-5s r1lv3216r**-7s parameter symbol min. max. min. max. unit note byte setup time t bs 5 - 5 - ms byte recove ry time t br 5 - 5 - ms byte# timing waveforms cs2 cs1# byte# t bs t br
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 11 of 16 timing waveforms read cycle *1 note1. byte# vcc ? 0.2v or byte# 0.2v t aa t blz cs2 cs1# oe# a 0~20 a -1~20 lb#,ub# we# dq 0~15 dq 0~7 v ih v il t oh t ba t bhz t clz1 t acs1 t clz2 t acs2 t oe t olz t chz1 t chz2 t ohz valid data high impedance we# = ?h? level (word mode) (byte mode) t rc (word mode) (byte mode)
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 12 of 16 write cycle (1) *1 (we# clock) note1. byte# vcc ? 0.2v or byte# 0.2v cs2 cs1# oe# a 0~20 a -1~20 lb#,ub# we# dq 0~15 dq 0~7 t oh t bw t cw t cw t ow t ohz (word mode) (byte mode) t wc (word mode) (byte mode) t aw t as t wp t wr t dw t dh t whz valid data t olz
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 13 of 16 write cycle (2) *1 (cs1#, cs2 clock) note1. byte# vcc ? 0.2v or byte# 0.2v cs2 cs1# oe# a 0~20 a -1~20 lb#,ub# we# dq 0~15 dq 0~7 v ih v il t bw t cw t cw oe# = ?h? level (word mode) (byte mode) t wc (word mode) (byte mode) t aw valid data t as t wr t wr t dw t dh t as t wp
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 14 of 16 write cycle (3) *1 (lb#, ub# clock) note1. byte# vcc ? 0.2v or byte# 0.2v cs2 cs1# oe# a 0~20 a -1~20 lb#,ub# we# dq 0~15 dq 0~7 v ih v il t bw t cw t cw oe# = ?h? level (word mode) (byte mode) t wc (word mode) (byte mode) valid data t aw t as t wp t wr t dw t dh
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 15 of 16 low vcc data retention characteristics parameter symbol min. typ. max. unit test conditions *3 v cc for data retention v dr 2.0 - 3.6 v vin 0v byte# vcc -0.2v or byte# 0.2v (1) 0v cs2 0.2v or (2) cs1# v cc -0.2v, cs2 v cc -0.2v or (3) lb# = ub# v cc -0.2v, cs1# 0.2v, cs2 v cc -0.2v - 4 *1 12 p a ~+25c - 7 *2 24 p a ~+40c - - 50 p a ~+70c data retention current i ccdr - - 80 p a ~+85c vin 0v byte# vcc -0.2v or byte# 0.2v (1) 0v cs2 0.2v or (2) cs1# v cc -0.2v, cs2 v cc -0.2v or (3) lb# = ub# v cc -0.2v, cs1# 0.2v, cs2 v cc -0.2v chip select to data retention time t cdr 0 - - ns operation recovery time t r 5 - - ms see retention waveform. note 1. typical parameter indicates the value for the center of distribution at 3.0v (ta= 25oc), and not 100% tested. 2. typical parameter indicates the va lue for the center of di stribution at 3.0v (ta= 40oc), and not 100% tested. 3. cs2 also controls address buffer, we# buffer ,c s1# buffer ,oe# buffer ,lb# ,ub# buffer and din buffer. if cs2 controls data retent ion mode, vin levels (address, we# ,oe #,cs1#,lb#,ub#,i/o) c an be in the high impedance state. if cs1# controls dat a retention mode, cs2 must be cs2 vcc-0.2v or0v cs2 0.2v. the other input levels (address, we# ,oe#,cs1#,lb#,ub#,i/o) can be in the high impe dance state.
r1lv3216r series rej03c0367-0100, rev.1.00, 2009.05.07 page 16 of 16 low vcc data retention timing waveforms *1 note1. byte# vcc ? 0.2v or byte# 0.2v cs2 cs1# lb#, ub# vcc vcc vcc (1) cs1# controlled (2) cs2 controlled (3) lb#, ub controlled t cdr t r 2.7v 2.7v 2.2v 2.2v v dr t cdr t r 2.7v 2.7v 2.2v 2.2v v dr t cdr t r 2.7v 2.7v 0.6v 0.6v v dr cs1#
revision history r1lv3216 r series data sheet contents of revision rev. date page description 0.01 mar.24, 2008 - initial issu e: preliminary data sheet 1.00 may 07, 2009 - finalized 5 operation table corrected 6 error corrected: i sb test condition cs2=v ih ->v il
notes: 1. this document is provided for reference purposes only so that renesas customers may select the appropriate renesas products for their use. renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of renesas or any third party with respect to the information in this document. 2. renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. you should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. when exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. all information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. such information, however, is subject to change without any prior notice. before purchasing or using any renesas products listed in this document, please confirm the latest product information with a renesas sales office. also, please pay regular and careful attention to additional and different information to be disclosed by renesas such as that disclosed through our website. (http://www.renesas.com ) 5. renesas has used reasonable care in compiling the information included in this document, but renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. when using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or renesas products. 7. with the exception of products specified by renesas as suitable for automobile applications, renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. if you are considering the use of our products for such purposes, please contact a renesas sales office beforehand. renesas shall have no liability for damages arising out of the uses set forth above. 8. notwithstanding the preceding paragraph, you should not use renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use renesas products in any of the foregoing applications shall indemnify and hold harmless renesas technology corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. you should use the products described herein within the range specified by renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. renesas shall have no liability for malfunctions or damages arising out of the use of renesas products beyond such specified ranges. 10. although renesas endeavors to improve the quality and reliability of its products, ic products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. in case renesas products listed in this document are detached from the products to which the renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. you should implement safety measures so that renesas products may not be easily detached from your products. renesas shall have no liability for damages arising out of such detachment. 12. this document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from renesas. 13. please contact a renesas sales office if you have any questions regarding the information contained in this document, renesas semiconductor products, or if you have any other inquiries. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.com refer to " http://www.renesas.com/en/network " for the latest and detailed information. renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500, fax: <1> (408) 382-7501 renesas technology europe limited dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, u.k. tel: <44> (1628) 585-100, fax: <44> (1628) 585-900 renesas technology (shanghai) co., ltd. unit 204, 205, aziacenter, no.1233 lujiazui ring rd, pudong district, shanghai, china 200120 tel: <86> (21) 5877-1818, fax: <86> (21) 6887-7858/7898 renesas technology hong kong ltd. 7th floor, north tower, world finance centre, harbour city, canton road, tsimshatsui, kowloon, hong kong tel: <852> 2265-6688, fax: <852> 2377-3473 renesas technology taiwan co., ltd. 10th floor, no.99, fushing north road, taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 3518-3399 renesas technology singapore pte. ltd. 1 harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas technology korea co., ltd. kukje center bldg. 18th fl., 191, 2-ka, hangang-ro, yongsan-ku, seoul 140-702, korea tel: <82> (2) 796-3115, fax: <82> (2) 796-2145 renesas technology malaysia sdn. bhd unit 906, block b, menara amcorp, amcorp trade centre, no.18, jln persiaran barat, 46050 petaling jaya, selangor darul ehsan, malaysia tel: <603> 7955-9390, fax: <603> 7955-9510 renesas sales offices ? 2009. renesas technology corp., all rights reserved. printed in japan. colophon .7.2
to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation ( http://www.renesas.com ) send any inquiries to http://www.renesas.com/inquiry .
notice 1. all information included in this document is current as of th e date this document is issued. such information, however, is subject to change without any prior notice. before purchasing or using any renesas electronics products listed herein, please confirm the latest product information with a renesas electronics sales office. also, please pay regular and careful attention to additional and different information to be disclosed by renesas electronics such as that disclosed through our website. 2. renesas electronics does not assume any liability for infringement of patents, copyrights, or other intellectual property ri ghts of third parties by or arising from the use of renesas electronics products or technical information described in this document . no license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property right s of renesas electronics or others. 3. you should not alter, modify, copy, or otherwise misappropriate any renesas electronics product, whether in whole or in part . 4. descriptions of circuits, software and other related information in this document are provided only to illustrate the operat ion of semiconductor products and application examples. you are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. renesas electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 5. when exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. you should not use renesas electronics products or the technology de scribed in this document for any purpose re lating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. renesas electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. 6. renesas electronics has used reasonable care in preparing the information included in this document, but renesas electronics does not warrant that such information is error free. renesas electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or om issions from the information included herein. 7. renesas electronics products are classified according to the following three quality grades: ?standard?, ?high quality?, an d ?specific?. the recommended applications for each renesas electronics product depends on the product?s quality grade, as indicated below. you must check the quality grade of each renesas electronics product before using it in a particular application. you may not use any renesas electronics product for any application categorized as ?specific? without the prior written consent of renesas electronics. further, you may not use any renesas electronics product for any application for which it is not intended without the prior written consent of renesas electronics. renesas electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any renesas electronics product for a n application categorized as ?specific? or for which the product is not intended where you have failed to obtain the prior writte n consent of renesas electronics. the quality grade of each renesas electronics product is ?standard? unless otherwise expressly specified in a renesas electronics data sheets or data books, etc. ?standard?: computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and industrial robots. ?high quality?: transportation equipment (automobiles, trains, ship s, etc.); traffic control systems; anti-disaster systems; an ti- crime systems; safety equipment; and medical equipment not specifically designed for life support. ?specific?: aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life. 8. you should use the renesas electronics products described in this document within the range specified by renesas electronics , especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. renesas electronics shall have no liability for malfunctions o r damages arising out of the use of renesas electronics products beyond such specified ranges. 9. although renesas electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. fur ther, renesas electronics products are not subject to radiation resistance design. please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a renesas electronics product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. because the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 10. please contact a renesas electronics sales office for details as to environmental matters such as the environmental compatibility of each renesas electronics product. please use re nesas electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of c ontrolled substances, including without limitation, the eu rohs directive. renesas electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 11. this document may not be reproduced or duplicated, in any fo rm, in whole or in part, without prior written consent of renes as electronics. 12. please contact a renesas electronics sales office if you have any questions regarding the information contained in this document or renesas electronics products, or if you have any other inquiries. (note 1) ?renesas electronics? as used in this document means renesas electronics corporation and also includes its majority- owned subsidiaries. (note 2) ?renesas electronics product(s)? means any product developed or manufactured by or for renesas electronics.

▲Up To Search▲

Price & Availability of R1LV3216RSD-5SIB0

	To Download R1LV3216RSD-5SIB0 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .